Final Exam
CSC 252
8 May 2019
Computer Science Department
University of Rochester
Instructor: Yuhao Zhu
TAs: Jessica Ervin, Yu Feng, Max Kimmelman, Olivia Morton, Yawo Alphonse Siatitse,
Yiyang Su, Amir Taherin, Samuel Triest, Minh Tran
Name: ____________________________________
Problem 0 (3 points):
Problem 1 (17 points):
Problem 2 (10 points):
Problem 3 (20 points):
Problem 4 (20 points):
Problem 5 (30 points):
Total (100 points):
Remember “I don’t know” is given 15% partial credit, but you must erase everything else. This
does not apply to extra credit questions.
Your answers to all questions must be contained in the given boxes. The lengths of the boxes
should be more or less indicative of the lengths of your answers. Use spare space to show all
supporting work to earn partial credit.
You have 2 hours 45 minutes to work.
Please sign the following. I have not given nor received any unauthorized help on this exam.
Signature:___________________________________________________________
GOOD LUCK!!!
And have a great summer break.
1
Problem 0: Warm-up (3 Points)
Some people say 252 shouldn’t be required for the BS. What say you? (Hint: the correct answer
is YES, IT SHOULD BE, but we are not necessarily looking for the correct answer here.)
Problem 1: Floating-Point Arithmetics (17 points)
In this problem, we assume that IEEE decided to add a new N-bit representation, with its main
characteristics consistent with the other IEEE standards. This N-bit representation could
represent the value exactly, but cannot represent the value exactly. The smallest21 8
1 43 4
1
positive normalized value it can represent is 2-62.
Part a) (3 points) Put in binary normalized form.21 8
1
Part b) (3 points) Of the N bits, how many bits are fraction bits?
Part c) (3 points) Of the N bits, how many bits are exponent bits?
Part d) (4 points) What is N?
Part e) (4 points) What is the bias?
2
Problem 2: Pipelining (10 points)
A pipelined processor has 5 stages with delays as follows:
Stage 1 28 ns
Stage 2 59 ns
Stage 3 23 ns
Stage 4 34 ns
Stage 5 36 ns
The delay of pipeline registers between two stage is 1 ns.
Part a) (4 points) What is the cycle time of this processor? Recall the cycle time refers to the
delay of a single clock cycle.
Part b) (6 points) Now we execute 8 instructions on this pipelined processor. What is the
speedup that the pipeline achieves compared to a non-pipelined design? Assume that there are
no pipeline stalls. Show your work to earn partial credit.
3
Problem 3: Assembly Programming (20 points)
Clark Kent has taken CSC 252 and is working on research project on ISA. Clark defines
Kryptonian numbers and Xenonian numbers as follows.
● A binary number is said to be Kryptonian if and only if there are more 0’s than 1’s when
we discard the leading zeros. For example, 100100
2 is Kryptonian and 0000011112 is not.
● A binary number is said to be Xenonian if and only if there are exactly 4 1’s. For example,
110110
2 is Xenonian and 111112 is not.
Part a) (8 points) Consider the 32-bit two’s complement representation. Is 18
10 a Kryptonian,
and is -18
10 a Xenonian? Show your work to earn partial credit.
Part b) (12 points) Clark wants to add two new flags to the standard x86-64 ISA.
● Krypton Flag: set if a number is Kryptonian.
● Xenon Flag: set if a number is Xenonian.
According to Clark’s ISA specification, the addl instruction sets these two flags according to the
addition result, and the movl instruction sets these two flags according to the content of the
source operand, i.e., the content that is being moved. No other instructions change these two
flags. Other flags are set as in the standard x86-64 ISA.
Further, Clark implemented the following two instructions:
● jkr addr : jump to the address specified by addr if the Krypton flag is set and the
Overflow flag is not set.
● jxn addr : jump to the address specified by addr if the Xenon flag is set and the
Overflow flag is not set.
He wrote the following function in assembly language to test his work. Recall from the
programming assignments that movl instructions move a 4 byte integer to the destination, and
the size of the data moved by the mov instructions is implicit in the operands. We assume an
assembly syntax where the source is the first operand and the destination is the second operand.
00000000000005fa :
5fa: 55 push %rbp
5fb: 48 89 e5 mov %rsp,%rbp
4
5fe: 89 7d ec mov %edi,-0x14(%rbp)
601: 48 89 75 e0 mov %rsi,-0x20(%rbp)
605: c7 45 f8 00 00 00 00 movl $0x0,-0x8(%rbp)
60c: c7 45 fc 12 00 00 00 movl $0x12,-0x4(%rbp)
613: eb 0e jmp 61f
615: 7e 04 jkr 61b
617: 83 45 f8 01 addl $0x1,-0x8(%rbp)
61b: 83 45 fc 01 addl $0x1,-0x4(%rbp)
61f: 83 7d fc 35 cmpl $0x35,-0x4(%rbp)
624: 7e ec jle 615