EECS 414
Introduction to MEMS
Fall 2024
Reading Assignments
● Class Handouts and Notes, “Review of Standard Microfabrication Technologies”, “Silicon Etching”, and “Wafer Bonding”
Homework #4
Total: 180 Points
Handed Out: Friday Sept. 20, 2024
Due: Friday Sept. 27, 2024 @ 9 pm
1. Which one of the following wafer bonding techniques would normally require processing of the wafers at a temperature of less than 300°C (circle all that apply): 5 points
a) Si-Glass anodic bonding
b) Wafer bonding using Parylene
c) Wafer bonding using BCB
d) Fusion bonding
e) Eutectic bonding
2. In DRIE (Deep Reactive Ion Etching), select all the correct options: 5 Points
a) The etch rate is temperature dependent
b) High aspect ratio etching can be maintained all the way through the wafer.
c) The sidewall of etch profile results in scalloping due to repeated polymer deposition and etching for sidewall protection.
d) Photoresist can be used as a masking material
3. Which of these properties of silicon depend on crystallographic direction (circle all that apply): 5 points
a) Density
b) Carrier mobility
c) Etch rate in DRIE
d) Etch rate in EDP
e) Oxidation rate in high-temperature wet environment
4. In silicon wet etching, select all the correct ones: 5 Points
a) The wet etch process is always anisotropic.
b) The etch rate of (100) plane is faster because of higher concentration of silicon atoms in this plane.
c) The etch rate of (111) plane is slower than that of other planes in some wet etchants.
d) The etch rate is increased if the etch solution is heated.2
5. Which one of the following wafer bonding techniques would require the application of an electric field/voltage to enable the bond: (circle all that apply): 5 points
f) Si-Glass anodic bonding
g) Wafer bonding using Parylene
h) Silicon to silicon bonding using an intermediate evaporated glass film
i) Fusion bonding
j) Thermocompression bonding
k) Eutectic bonding
6. Anodic bonding of a 7740 Pyrex glass wafer to a silicon wafer is accomplished because of which of the following actions during the bonding process (circle all that apply): 5 points
f) Electric field uncovers oxygen ions at the surface
g) The raised temperature will make the glass soft
h) The raised temperature will make the glass conductive
i) The high voltage makes the silicon conductive
j) The high voltage attracts the two wafers together
k) The raised temperature helps oxidize the silicon
7. Which of the following chemicals are routinely used to etch silicon through specific crystal planes (circle all that apply): 5 points
a) BHF
b) KOH
c) TMAH
d) HCl
e) Hot phosphoric acid
f) HF+HNO3+Acitic
8. This problem involves the wet etching of a silicon wafer which is covered by oxide. The oxide is removed in the areas shown. Assume the entire wafer is covered by oxide all the way to the edge and that the openings in the oxide are in the center of the wafer, so the areas around the wafer are not etched.
The figure below shows six different layouts (designs) showing areas where the oxide is removed. In each layout/design, the dark areas are oxide, and the clear open areas are where the oxide is etched to expose the silicon underneath. Note that the silicon wafer is not shown. All wafers are (100)-oriented wafers. Please note the direction of the flat for each case. Assume the wafer is thick enough so we do not ever etch all the way through the wafer. Now we etch the wafer through the openings in the oxide in a wet etchant like EDP/KOH for a long time. Please note that etching will be only from the top (front) and there will be no etching from the sides or the bottom (back) side of the wafer at all.
Please show the top view for each case after it has been etched in the KOH/EDP for a long time. Show the lines where the exposed etched planes meet, and if there are any specific angles, please show those in your drawings. You can draw the lines showing the top view right on top of the drawing provided for each case. I only need the top view; no cross section is needed. 35 Points
9. This problem deals with the etching of (100) silicon wafer which was oxidized at 1000o
C to form. a thermal oxide film of 1 µm. On the top side, the oxide layer is patterned such that the arrays of rectangular and square openings are formed as shown below. There are five groups of patterns that are separated by 50 µm, symmetrically around the center of the wafer in the horizontal direction. The sizes of openings for each group are specified in the figure. Initially, only the top side oxide is patterned while the back (bottom) side is still entirely covered with thermal oxide.
The wafer is etched in EDP with an etch rate of 1 µm/minute for all planes except for the (111) planes which do not etch at all. The wafer thickness is 150 µm and the oxide masks do not etch in EDP. The whole wafer is etched in EDP solution but you can neglect the silicon etching from the sides.
Now the wafer is etched for 100 minutes. Assume that all the convex corners are attacked and completely removed, so that the etching is progressed to the edge of all the lateral undercuts. Show the pattern formed in the wafer: the top view and the cross-sectional view across the line A-A’. You should label all the relevant planes in your cross-sectional view, show all the relevant angles, and also show all the relevant dimensions. 35 points
10. The following three wafers have oxide everywhere except in areas shown by the clear patterns. All wafers are (100) and the flat direction for each is shown. I have also provided a coordinate with a few angles for your reference when you draw your answers. Please show the top view for each case when each wafer is etched in EDP for a long time until all etching stops. There is no etching outside of the wafer die (i.e., the square area). Please show any angles you deem important. You can draw the top views on the figures provided, but make sure it is visible. 35 Points
11. This problem deals with the fabrication of a suspended beam structure made of silicon nitride. The beam is to be formed by etching of a 4” diameter (100) silicon wafer that is 500µm thick and is covered with silicon nitride all around. The nitride is removed from the top side of the wafer in the two triangular areas (shown as clear) to create the pattern shown in the figure. The beam is across one of the diagonals of the square that is shown and has a side length of 1000µm. The beam width is W. The cross-sectional view along A-A’ is also shown. The wafer is now 6 etched in EDP for different amounts of time. Assume the etch rate of all planes is 1µm/minute, except for the {111} planes which do not etch at all.
12. a) What is the largest value for beam width, W, that would allow the beam to be completely undercut and released when the wafer is etched in EDP for a long time? 15 Points
b) What is the minimum amount of time needed to make sure the beam is completely undercut (released) so there is no silicon left underneath the beam (all silicon has to be etched until you reach the corners of the square that circumscribes the beam). 25 points